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| {{short description|Photolithography technique where there is a layer of water between a lens and a microchip}} | |||
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| '''Immersion lithography''' is a technique used in ] to enhance the resolution and accuracy of the ]. It involves using a liquid medium, typically water, between the lens and the ] during exposure. By using a liquid with a higher ] than air, immersion lithography allows for smaller features to be created on the wafer.<ref>{{Cite journal |last=Flagello |first=Donis |date=2004-01-01 |title=Benefits and limitations of immersion lithography |url=http://nanolithography.spiedigitallibrary.org/article.aspx?doi=10.1117/1.1636768 |journal=Journal of Micro/Nanolithography, MEMS, and MOEMS |language=en |volume=3 |issue=1 |pages=104 |doi=10.1117/1.1636768 |bibcode=2004JMM&M...3..104M |issn=1932-5150}}</ref> | |||
| ⚫ | |||
| ⚫ | Immersion lithography replaces the usual air gap between the final lens and the wafer surface with a liquid medium that has a refractive index greater than one. The ] is increased by a factor equal to the refractive index of the liquid. Current immersion lithography tools use highly purified water for this liquid, achieving feature sizes below 45 nanometers.<ref>{{Cite web |url=http://www.dailytech.com/IDF09+Intel+Demonstrates+First+22nm+Chips+Discusses+Die+Shrink+Roadmap/article16312.htm |title=DailyTech - IDF09 Intel Demonstrates First 22nm Chips Discusses Die Shrink Roadmap |access-date=2009-12-07 |archive-url=https://web.archive.org/web/20100828220949/http://www.dailytech.com/IDF09+Intel+Demonstrates+First+22nm+Chips+Discusses+Die+Shrink+Roadmap/article16312.htm |archive-date=2010-08-28 |url-status=dead }}</ref> | ||
| ==Benefits of immersion lithography== | |||
| ⚫ | The ability to resolve features in optical lithography is directly related to the ] of the imaging equipment, the numerical aperture being the sine of the maximum refraction angle multiplied by the refractive index of the medium through which the light travels. The lenses in the highest resolution "dry" photolithography scanners focus light in a cone whose boundary is nearly parallel to the wafer surface. As it is impossible to increase resolution by further refraction, additional resolution is obtained by inserting an immersion medium with a higher index of refraction between the lens and the wafer. The blurriness is reduced by a factor equal to the refractive index of the medium. For example, for water immersion using ] at 193 nm wavelength, the index of refraction is 1.44. | ||
| ==Background== | |||
| ⚫ | The resolution enhancement from immersion lithography is about |
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| ⚫ | The ability to resolve features in ] is directly related to the ] of the imaging equipment, the numerical aperture being the sine of the maximum refraction angle multiplied by the ] of the medium through which the light travels. The lenses in the highest resolution "dry" photolithography scanners focus light in a cone whose boundary is nearly parallel to the wafer surface. As it is impossible to increase resolution by further refraction, additional resolution is obtained by inserting an immersion medium with a higher index of refraction between the lens and the wafer. The blurriness is reduced by a factor equal to the refractive index of the medium. For example, for water immersion using ] at 193 nm wavelength, the index of refraction is 1.44.<ref>{{Cite book |last1=Smith |first1=Bruce W. |last2=Kang |first2=Hoyoung |last3=Bourov |first3=Anatoly |last4=Cropanese |first4=Frank |last5=Fan |first5=Yongfa |title=Optical Microlithography XVI |chapter=Water immersion optical lithography for 45-nm node |editor-first1=Anthony |editor-last1=Yen |date=2003-06-26 |chapter-url=https://www.spiedigitallibrary.org/conference-proceedings-of-spie/5040/0000/Water-immersion-optical-lithography-for-the-45-nm-node/10.1117/12.485489.full |publisher=SPIE |volume=5040 |pages=679–689 |doi=10.1117/12.485489|bibcode=2003SPIE.5040..679S }}</ref> | ||
| ⚫ | The resolution enhancement from immersion lithography is about 30–40% depending on materials used. However,{{clarify|date=November 2020|reason="However" implies a contrast, but both sentences describe advantages.}} the depth of focus, or tolerance in wafer topography flatness, is improved compared to the corresponding "dry" tool at the same resolution.<ref>B. J. Lin, J. Microlith Microfab. Microsyst. 1, 7 (2002).</ref> | ||
| The successful emergence of immersion lithography comes not just from its ability to extend resolution and depth of focus, but also from its timely introduction to the industry (e.g., IBM, AMD) between ] and ] nodes. | |||
| The idea for immersion lithography was patented in 1984 by Takanashi et al.<ref>A. Takanashi, T. Harada, M. Akeyama, Y. Kondo, T. Karosaki, S. Kuniyoshi, S. Hosaka, and Y. Kawamura, U. S. Patent No. 4,480,910 (1984)</ref> It was also proposed by Taiwanese engineer ] and realized in the 1980s.<ref>] (1987). "The future of subhalf-micrometer optical lithography". ''Microelectronic Engineering'' '''6''', 31–51</ref> In 2004, ]'s director of ] technology, ], announced that IBM planned to commercialize lithography based on light filtered through water.<ref name="businessweek">{{Cite web |url=http://www.businessweek.com/technology/content/jan2004/tc20040121_4923_tc139.htm |title=A Whole New World of Chips |website=] |url-status=dead |archive-url=https://web.archive.org/web/20110221072557/http://www.businessweek.com/technology/content/jan2004/tc20040121_4923_tc139.htm |archive-date=2011-02-21 }}</ref> | |||
| Intel's 32 nm process uses second-generation high-k, metal gate technology, but this will be the first time Intel has deployed immersion lithography.<ref></ref> | |||
| ==Defects== | |||
| ==Manufacturing issues== | |||
| ⚫ | Defect concerns, e.g., water left behind (watermarks) and loss of resist-water adhesion (air gap or bubbles), have led to considerations of using a topcoat layer directly on top of the ].<ref>Y. Wei and R. L. Brainard, Advanced Processes for 193-nm Immersion Lithography, (c) SPIE 2009, Ch.6.</ref> This topcoat would serve as a barrier for chemical diffusion between the liquid medium and the photoresist. In addition, the interface between the liquid and the topcoat would be optimized for watermark reduction. At the same time, defects from topcoat use should be avoided. | ||
| The main obstacle to adoption of immersion lithography systems has been defects and other possible sources of yield loss. Early studies focused on the elimination of bubbles in the immersion fluid, temperature and pressure variations in the immersion fluid, and immersion fluid absorption by the ].<ref>M. Switkes ''et al.'', J. Vac. Sci. & Tech. B vol. 21, pp. 2794-2799 (2003).</ref> Degassing the fluid, carefully constraining the fluid ] and carefully treating the top layer of photoresist have been key to the implementation of immersion lithography. Defects intrinsic to immersion lithography have been identified.<ref>U. Okoroanyanwu ''et al.'', "Defectivity in water immersion lithography," Microlithography World, November 2005.</ref> Reducing particle generation due to the water dispensing unit was found to reduce the incidence of defects. Water also has been shown to extract acid from photoresist.<ref>J. C. Taylor ''et al.'', SPIE vol. 5376, pp. 34-43 (2004).</ref> Specifically, photoacid generators (PAGs) are extracted into the water, which produce acid upon radiation exposure. This must be managed to ensure the lens is not corroded by the acid or contaminated by the extracted agents, and the photoresist is not chemically altered to the point of being defective. Still, since diffusion of contaminants is expected to be much slower in water than in air or vacuum, consideration of optics contamination actually favors immersion lithography. Water-soaked photoresist also has been demonstrated to produce very satisfactory images.<ref>A. K. Raub ''et al.'', J. Vac. Sci. & Tech. B vol. 22, pp. 3459-3464 (2004).</ref> | |||
| As of 2005, Topcoats had been tuned for use as ] coatings, especially for hyper-NA (NA>1) cases.<ref>J. C. Jung et al., Proc. SPIE 5753 (2005).</ref> | |||
| In addition, 193 nm light has been known to ionize water,<ref>A. Iwata ''et al.'', Chem. Lett., vol. 22, 1939 (1993).</ref> producing ]s, which may spread and react with the photoresist, affecting the resolution performance. | |||
| By 2008, defect counts on wafers printed by immersion lithography had reached zero level capability.<ref></ref> | |||
| ⚫ | |||
| ==Polarization impacts== | |||
| As scanning speeds typically approach 500 mm/s for high-volume manufacturing, the actual resist-water contact time in any given exposure area is minimal. Hence the main concerns for defects are water left behind (watermarks) and loss of resist-water adhesion (air gap). The hydrophobicity of the surface and the water delivery/removal method are therefore the key areas to address. Other areas where defects may be enhanced are at the wafer edge, where the water has to do an "about-face" (reverse motion). It is important for the water not to pick up defects from the wafer backside. | |||
| As of 2000, ] effects due to high angles of interference in the photoresist were considered as features approach 40 nm.<ref>C. Wagner ''et al.'', Proc. SPIE vol. 4000, pp. 344-357 (2000).</ref> Hence, illumination sources generally need to be azimuthally polarized to match the pole illumination for ideal ] imaging.<ref>B. W. Smith, L. V. Zavyalova, and A. Estroff, Proc. SPIE 5377 (2004).</ref> | |||
| ==Throughput== | |||
| Generally, implementation into manufacturing is only considered when defect yields reach a mature level, e.g., comparable to dry lithography levels. | |||
| ] | |||
| As of 1996, this was achieved through higher stage speeds,<ref name=stepscan>{{Cite web |url=https://staticwww.asml.com/doclib/productandservices/94081.pdf |title=M. A. van den Brink et al., Proc. SPIE 2726, 734 (1996). |access-date=2018-07-16 |archive-date=2017-08-09 |archive-url=https://web.archive.org/web/20170809032333/http://staticwww.asml.com/doclib/productandservices/94081.pdf |url-status=dead }}</ref><ref>I. Bouchoms et al., Proc. SPIE 8326, 83260L (2012)</ref> which in turn, as of 2013 were allowed by higher power ] pulse sources.<ref>{{Cite web |last=Inc |first=Rostislav Rokitski, R. Rafac, R. Dubi, J. Thornes, J. melchior, T. Cacouris, M. Haviland and D. Brown, Cymer |date=2013 |title=120-W ArFi Laser Makes Higher-Dose Lithography Possible |url=https://www.photonics.com/Articles/120-W_ArFi_Laser_Makes_Higher-Dose_Lithography/a53765 |access-date=2022-11-09 |website=www.photonics.com}}</ref> Specifically, the throughput is directly proportional to stage speed V, which is related to dose D and rectangular slit width S and slit intensity I<sub>ss</sub> (which is directly related to pulse power) by V=I<sub>ss</sub>*S/D. The slit height is the same as the field height. The slit width S, in turn, is limited by the number of pulses to make the dose (n), divided by the frequency of the laser pulses (f), at the maximum scan speed V<sub>max</sub> by S=V<sub>max</sub>*n/f.<ref name=stepscan/> At a fixed frequency f and pulse number n, the slit width will be proportional to the maximum stage speed. Hence, throughput at a given dose is improved by increasing maximum stage speed as well as increasing pulse power. | |||
| ==Future of immersion lithography== | |||
| As of 2007, many companies, including ], ], ], and ] are ramping for the ] node using immersion lithography. ]'s Fab 36 is already equipped for using immersion lithography for its ], 45 nm and ] node technologies.<ref>D. Grose, 2007 Technology Analyst Day, July 26, 2007.</ref> AMD has also made preparations for advanced design for manufacturability (DFM), including layout regularity and ] at the 22 nm node, using immersion lithography.<ref>"DFM, Design Restrictions Enable Double Patterning," Semiconductor International, 12/1/2007 .</ref> For the 32 nm node in 2009, ] will begin using immersion lithography as well. Intel has confirmed that since ] will not be available, it will extend 193 nm immersion lithography to the 22 nm node <ref></ref> and 15 nm node.<ref></ref> Intel has already outlined a path to use 193 nm immersion lithography down to 11 nm node.<ref>Presentation by Y. Borodovsky, "Marching to the Beat of Moore's Law," SPIE Microlithography 2006.</ref> IBM has also stated that it will be using immersion lithography for the 22 nm node, since no other alternative is available at this time.<ref></ref> | |||
| ] | |||
| Enhancements necessary to extend the technology beyond the ] node are currently being investigated. Such enhancements include the use of higher refractive-index materials in the final lens, immersion fluid, and photoresist, in order to improve the resolution with single patterning. | |||
| According to ASML s product information about twinscan-nxt1980di, immersion lithography tools currently{{when|date=November 2022}} boasted the highest throughputs (275 WPH) as targeted for high volume manufacturing.<ref>{{Cite web |date=nd |title=The ASML NXT:1980Di lithography system |url=https://www.asml.com/en/products/duv-lithography-systems/twinscan-nxt1980di |access-date=2022-11-09 |website=www.asml.com |language=en}}</ref> | |||
| Currently, the most promising high-index lens material is ], with a refractive index of 2.14. High-index immersion fluids are approaching refractive index values of 1.7. These new developments allow the optical resolution to approach ~30 nm. However, it is expected that at some point below 40 nm, current photoresists will limit further scaling.<ref>U. Okoroanyanwu and J. H. Lammers, Future Fab International, Issue 17 (2004).</ref> Polarization effects due to high angles of interference in the photoresist also have to be considered as features approach 40 nm.<ref>C. Wagner ''et al.'', Proc. SPIE vol. 4000, pp. 344-357 (2000).</ref> Hence, new photoresists will need to be developed for sub-40 nm applications. | |||
| ==Multiple patterning== | |||
| On the other hand, ] has received interest recently since it can potentially increase the half-pitch resolution by a factor of 2. This could allow the use of immersion lithography tools beyond the ] node, potentially to the ] node. While double patterning improves pitch resolution, it must rely on non-lithographic methods, such as trimming, to actually reduce the feature size, possibly by as much as 50%. | |||
| ] | |||
| ] | |||
| {{unreferenced section|date=November 2022}} | |||
| The resolution limit for a 1.35 NA immersion tool operating at 193 nm wavelength is 36 nm. Going beyond this limit to sub-] nodes requires ].<ref>Haley, G. (2023). 193i Lithography Takes Center Stage...Again. Semiconductor Engineering. Retrieved from <nowiki>https://semiengineering.com/193i-lithography-takes-center-stage-again</nowiki></ref> At the 20nm foundry and memory nodes and beyond, double patterning and triple patterning are already being used{{when|date=November 2022}} with immersion lithography for the densest layers. | |||
| On March 23, 2012, with the release of the Ivy Bridge chip, Intel's Senior Fellow Mark Bohr stated that the company will be able to extend its current immersion process to the 14-nm and even 10-nm chips before ] would be necessary. He did not mention specific techniques that will be utilized. | |||
| ==See also== | |||
| *] | |||
| *] | |||
| ==References== | ==References== | ||
| {{reflist|30em}} | |||
| <references /> | |||
| {{DEFAULTSORT:Immersion Lithography}} | {{DEFAULTSORT:Immersion Lithography}} | ||
| ] | ] | ||
| ] | |||
| ] | ] | ||
Latest revision as of 00:04, 29 October 2024
Photolithography technique where there is a layer of water between a lens and a microchip
Immersion lithography is a technique used in semiconductor manufacturing to enhance the resolution and accuracy of the lithographic process. It involves using a liquid medium, typically water, between the lens and the wafer during exposure. By using a liquid with a higher refractive index than air, immersion lithography allows for smaller features to be created on the wafer.
Immersion lithography replaces the usual air gap between the final lens and the wafer surface with a liquid medium that has a refractive index greater than one. The angular resolution is increased by a factor equal to the refractive index of the liquid. Current immersion lithography tools use highly purified water for this liquid, achieving feature sizes below 45 nanometers.
Background
The ability to resolve features in optical lithography is directly related to the numerical aperture of the imaging equipment, the numerical aperture being the sine of the maximum refraction angle multiplied by the refractive index of the medium through which the light travels. The lenses in the highest resolution "dry" photolithography scanners focus light in a cone whose boundary is nearly parallel to the wafer surface. As it is impossible to increase resolution by further refraction, additional resolution is obtained by inserting an immersion medium with a higher index of refraction between the lens and the wafer. The blurriness is reduced by a factor equal to the refractive index of the medium. For example, for water immersion using ultraviolet light at 193 nm wavelength, the index of refraction is 1.44.
The resolution enhancement from immersion lithography is about 30–40% depending on materials used. However, the depth of focus, or tolerance in wafer topography flatness, is improved compared to the corresponding "dry" tool at the same resolution.
The idea for immersion lithography was patented in 1984 by Takanashi et al. It was also proposed by Taiwanese engineer Burn J. Lin and realized in the 1980s. In 2004, IBM's director of silicon technology, Ghavam Shahidi, announced that IBM planned to commercialize lithography based on light filtered through water.
Defects
Defect concerns, e.g., water left behind (watermarks) and loss of resist-water adhesion (air gap or bubbles), have led to considerations of using a topcoat layer directly on top of the photoresist. This topcoat would serve as a barrier for chemical diffusion between the liquid medium and the photoresist. In addition, the interface between the liquid and the topcoat would be optimized for watermark reduction. At the same time, defects from topcoat use should be avoided.
As of 2005, Topcoats had been tuned for use as antireflection coatings, especially for hyper-NA (NA>1) cases.
By 2008, defect counts on wafers printed by immersion lithography had reached zero level capability.
Polarization impacts
As of 2000, Polarization effects due to high angles of interference in the photoresist were considered as features approach 40 nm. Hence, illumination sources generally need to be azimuthally polarized to match the pole illumination for ideal line-space imaging.
Throughput
As of 1996, this was achieved through higher stage speeds, which in turn, as of 2013 were allowed by higher power ArF laser pulse sources. Specifically, the throughput is directly proportional to stage speed V, which is related to dose D and rectangular slit width S and slit intensity Iss (which is directly related to pulse power) by V=Iss*S/D. The slit height is the same as the field height. The slit width S, in turn, is limited by the number of pulses to make the dose (n), divided by the frequency of the laser pulses (f), at the maximum scan speed Vmax by S=Vmax*n/f. At a fixed frequency f and pulse number n, the slit width will be proportional to the maximum stage speed. Hence, throughput at a given dose is improved by increasing maximum stage speed as well as increasing pulse power.
According to ASML s product information about twinscan-nxt1980di, immersion lithography tools currently boasted the highest throughputs (275 WPH) as targeted for high volume manufacturing.
Multiple patterning
 | This section does not cite any sources. Please help improve this section by adding citations to reliable sources. Unsourced material may be challenged and removed. (November 2022) (Learn how and when to remove this message) |
The resolution limit for a 1.35 NA immersion tool operating at 193 nm wavelength is 36 nm. Going beyond this limit to sub-20nm nodes requires multiple patterning. At the 20nm foundry and memory nodes and beyond, double patterning and triple patterning are already being used with immersion lithography for the densest layers.
See also
References
- Flagello, Donis (2004-01-01). "Benefits and limitations of immersion lithography". Journal of Micro/Nanolithography, MEMS, and MOEMS. 3 (1): 104. Bibcode:2004JMM&M...3..104M. doi:10.1117/1.1636768. ISSN 1932-5150.
- "DailyTech - IDF09 Intel Demonstrates First 22nm Chips Discusses Die Shrink Roadmap". Archived from the original on 2010-08-28. Retrieved 2009-12-07.
- Smith, Bruce W.; Kang, Hoyoung; Bourov, Anatoly; Cropanese, Frank; Fan, Yongfa (2003-06-26). "Water immersion optical lithography for 45-nm node". In Yen, Anthony (ed.). Optical Microlithography XVI. Vol. 5040. SPIE. pp. 679–689. Bibcode:2003SPIE.5040..679S. doi:10.1117/12.485489.
- B. J. Lin, J. Microlith Microfab. Microsyst. 1, 7 (2002).
- A. Takanashi, T. Harada, M. Akeyama, Y. Kondo, T. Karosaki, S. Kuniyoshi, S. Hosaka, and Y. Kawamura, U. S. Patent No. 4,480,910 (1984)
- Burn J. Lin (1987). "The future of subhalf-micrometer optical lithography". Microelectronic Engineering 6, 31–51
- "A Whole New World of Chips". Business Week. Archived from the original on 2011-02-21.
- Y. Wei and R. L. Brainard, Advanced Processes for 193-nm Immersion Lithography, (c) SPIE 2009, Ch.6.
- J. C. Jung et al., Proc. SPIE 5753 (2005).
- B. Rathsack et al., Proc. SPIE 6924, 69244W (2008).
- C. Wagner et al., Proc. SPIE vol. 4000, pp. 344-357 (2000).
- B. W. Smith, L. V. Zavyalova, and A. Estroff, Proc. SPIE 5377 (2004).
- ^ "M. A. van den Brink et al., Proc. SPIE 2726, 734 (1996)" (PDF). Archived from the original (PDF) on 2017-08-09. Retrieved 2018-07-16.
- I. Bouchoms et al., Proc. SPIE 8326, 83260L (2012)
- Inc, Rostislav Rokitski, R. Rafac, R. Dubi, J. Thornes, J. melchior, T. Cacouris, M. Haviland and D. Brown, Cymer (2013). "120-W ArFi Laser Makes Higher-Dose Lithography Possible". www.photonics.com. Retrieved 2022-11-09.
{{cite web}}:|last=has generic name (help)CS1 maint: multiple names: authors list (link) - "The ASML NXT:1980Di lithography system". www.asml.com. nd. Retrieved 2022-11-09.
- Haley, G. (2023). 193i Lithography Takes Center Stage...Again. Semiconductor Engineering. Retrieved from https://semiengineering.com/193i-lithography-takes-center-stage-again