| Revision as of 17:16, 9 December 2019 editSineBot (talk | contribs)Bots2,556,209 editsm Signing comment by 128.86.177.225 - ""← Previous edit |
Latest revision as of 14:49, 9 February 2024 edit undoCewbot (talk | contribs)Bots7,838,013 editsm Maintain {{WPBS}} and vital articles: 1 WikiProject template. Create {{WPBS}}. Keep majority rating "C" in {{WPBS}}. Remove 1 same rating as {{WPBS}} in {{WikiProject Computing}}.Tag: Talk banner shell conversion |
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{{WikiProject Computing|importance=High|hardware=yes|hardware-importance=High}} |
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{{User:ClueBot III/ArchiveThis|archiveprefix=Talk:SPARC/Archives/|format=Y|age=26297|index=yes|archivebox=yes|box-advert=yes}} |
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== Sparc Mac's OSRS name == |
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Famous Runescape player Sparc Mac was inspired by the SPARC architecture for his Runescape username. This would be worth adding into the main article <!-- Template:Unsigned IP --><small class="autosigned">— Preceding ] comment added by ] (]) 17:15, 9 December 2019 (UTC)</small> <!--Autosigned by SineBot--> |
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== DFP == |
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There is a claim that some Fujitsu SPARC processors have hardware implementations of decimal floating point. I don't see a reference for this, though, so I looked here. Does anyone here know about that? ] (]) 20:52, 18 September 2017 (UTC) |
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:I presume you have seen ] ("Fujitsu also has Sparc processors with DFP in hardware"). |
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:I have never seen any definitive reference to DFP op-codes for any Fujitsu SPARC processor, but given Fujitsu ported their BS2000/OSD mainframe operating system (inherited from Siemens) to SPARC in the early 2000s, it would not be totally surprising to find they had either customised cores, or DFP co-processors (using the traditional SPARC co-processor interface) lurking in their SX series mainframes somewhere - Fujitsu SX mainframes might be a good place to start looking. |
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:Secondly, the SPARC64V was loosely based on the 1999 Fujitsu GS8900 (non-SPARC) mainframe processor, so *just might* therefore have some poorly-documented DFP capabilities hidden away somewhere, perhaps only available when loaded with "mainframe" microcode. |
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:The (Fujitsu) ], microSPARC-II and ] did not have DFP in hardware (except possibly using an external co-processor). |
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:Good luck with your search, remember to post any interesting results back here. ] (]) 11:08, 19 September 2017 (UTC) |
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== Soft-Cores versus Concrete Implementations == |
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Not too happy that "LEON4" is in the main table, with most of the fields blanked out (because it is a ***configurable*** VHDL "soft-core" rather than an actual microprocessor). Replacing it with a concrete implementation, eg: Cobham Gaisler GR740, where the data-fields *can* be filled-in, sounds like a better way to go. |
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Perhaps this page should have a separate summary paragraph listing the known SPARC soft-cores: OpenSPARC T1/T2; ERC32; the LEON series (with a link to the LEON Misplaced Pages article for the gory details); and so on. ] (]) 12:34, 19 September 2017 (UTC) |
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Thoughts? |
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: Alternative suggestion: could use eg: LEON4 or LEON3 as the generic-/code-name ("micro-architectural name"), and eg: GR740 or GR712RC as the specific model name ("concrete implementation name"). ] (]) 12:34, 19 September 2017 (UTC) |
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:: I have adopted the alternative suggestion, and updated the main article page accordingy. ] (]) 14:32, 19 September 2017 (UTC) |
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== Infrant IT3103 and IT3107 == |
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* http://www.businesswire.com/news/home/20050404005773/en/Infrant-Technologies-Introduces-IT3100-Network-Storage-Processor |
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* http://www.eetimes.com/document.asp?doc_id=1195625 |
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* http://debugmo.de/2007/07/running-own-code-on-the-infrant-readynas/ |
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As concrete (and heavily productized!) examples of embedded SPARC, it would be useful if we could dig up more information on the Infrant Technologies' IT3103 and IT3107 LEON2-based SPARC processors used in the Infrant (later NetGear) ReadyNAS NV1 boxes starting from 2005; eg configured on-chip cache sizes, process-node/die-size, power (W), no. I/O pins. We can surmise some details from the non-configurable parts of LEON2 (ie: threads/cores, arch. version) and some from the press releases and historical product brochures (ie: year 2005). ] (]) 14:03, 19 September 2017 (UTC) |
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== Open and Royalty free == |
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The ] currently says the instruction set is "open" and "royalty free". |
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* royalty free means, that – in contrast to the ] or the ] – anybody is free to implement an own microarchitecture base on it. Am I correct? |
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* what does "open" mean? <span style="text-shadow: 0.1em 0.1em 0.2em black">]</span><sup>]</sup> 10:14, 3 March 2018 (UTC) |
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== Oracle SPARC and Solaris Public Roadmap pdf not found == |
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Oracle SPARC and Solaris Public Roadmap pdf link should be updated or removed. <!-- Template:Unsigned --><small class="autosigned">— Preceding ] comment added by ] (] • ]) 14:12, 10 January 2019 (UTC)</small> <!--Autosigned by SineBot--> |
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:There doesn't appear to be any updated version, so I removed it.--] (]) 07:07, 11 January 2019 (UTC) |
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