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|- |-
|1982 |1982
|R. Fabian Pease |]
David B. Tuckerman ]
|High-Performance Heat Sinking for VLSI  EDL/ED-2/5 |
|- |-
|1983 |1983
|Jaroslav Hynecek |]
|Electron-Hole Recombination Antiblooming for Virtual-Phase CCD Imager  T-ED/ED-30/8 |
|- |-
|1984 |1984
|Shojiro Asai |Shojiro Asai
Norikazu Hashimoto Norikazu Hashimoto
Kiyoo Itoh Kiyoo Itoh
Line 31: Line 31:
Hideo Sunami Hideo Sunami
Toru Toyabe Toru Toyabe
|A Corrugated Capacitor Cell (CCC)  T-ED/ED- 31/6 |
|- |-
|1985 |1985
Line 42: Line 42:
William J. Skocpol William J. Skocpol
Donald M. Tennant Donald M. Tennant
|
|Single Electron Switching Events in MOSFET's  Nanometer-Scale Si, T-ED/ED- 32/
|- |-
|1986 |1986
|Ben T. Ebihara |Ben T. Ebihara
Peter Ramins Peter Ramins
|Improvements in the MDC and TWT Overall Efficiency Through the Application of Carbon Surfaces Electrode   T-ED/ED-33/11 |
|- |-
|1987 |1987
|Richard B. True |Richard B. True
|Emittance and the Design of Beam Formation, Transport, and Collection Systems in Periodically Focused TWT's  T-ED/ED-34/2 |
|- |-
|1988 |1988
Line 65: Line 65:
Simon Yu Simon Yu
Todd H. Yuzuriha Todd H. Yuzuriha
|
|Process and Device Performance of a High-Speed Double Poly-Si Bipolar Technology Using Process Borosenic-Poly with Coupling-Base Implant  T-ED/ED-35/8
|- |-
|1989 |1989
Line 71: Line 71:
Judy L. Hoyt Judy L. Hoyt
Clifford A. King Clifford A. King
|
|Bandgap and Transport Properties of Si1-xGex by Analysis of Nearly Ideal Si/Si1-xGex/Si Heterojunction Bipolar Transistors  T-ED/ED-36/10
|- |-
|1990 |1990
Line 77: Line 77:
Kenichiro Suzuki Kenichiro Suzuki
Kensall D. Wise Kensall D. Wise
|
|A 1024-Element High-Performance Silicon Tactile Imager  T-ED/ED-37/8
|- |-
|1991 |1991
Line 84: Line 84:
Shinji Okazaki Shinji Okazaki
Tsuneo Terasawa Tsuneo Terasawa
|
|New Approach to Resolution Limit and Advanced Image Formation Techniques in Optical Lithography   T-ED/ED-38/1
|- |-
|1992 |1992
Line 91: Line 91:
Loi D. Nguyen Loi D. Nguyen
Mark A. Thompson Mark A. Thompson
|
|50-nm Self-Aligned Gate Pseudomorphic AllnAs/GalnAs High Electron Mobility Transistors  T-ED/ED-39/9
|- |-
|1993 |1993
Line 98: Line 98:
Toyota Morimoto Toyota Morimoto
Masakatsu Tsuchiaki Masakatsu Tsuchiaki
|
|A New Charge Pumping Method for Determining the Spatial Distribution of Hot-Carrier- Induced Fixed Charge in p- MOSFETS's T-ED/ED-40/10
|- |-
|1994 |1994
Line 107: Line 107:
Koichi Seki Koichi Seki
Kazuo Yano Kazuo Yano
|
|Room-Temperature Single-Electron Memory  T-ED/ED-41/9
|- |-
|1995 |1995
Line 115: Line 115:
Pierre H. Woerlee Pierre H. Woerlee
Reinout Woltjer Reinout Woltjer
|Three Hot-Carrier Degradation Mechanisms in Deep-Submicron PMOSFETS  T-ED/ED-42/1 |
|- |-
|1996 |1996
Line 122: Line 122:
Carver A. Mead Carver A. Mead
Bradley A. Minch Bradley A. Minch
|A Single-Transistor Silicon Synapse T-ED/ED-43/11 |
|- |-
|1997 |1997
Line 129: Line 129:
Carlin J. Vieri Carlin J. Vieri
Isabel Y. Yang Isabel Y. Yang
|Back-Gated CMOS on SOIAS For Dynamic Threshold Voltage Control |
|- |-
|1998 |1998
|Yujun Li |Yujun Li
Tso-Ping Mai Tso-Ping Mai
|A Front-Gate Charge-Pumping Method for Probing Both Interfaces in SOI Devices |
|- |-
|1999 |1999
Line 148: Line 148:
Joy Laskar Joy Laskar
M. Ramana Murty M. Ramana Murty
|In (Ga)As/GaAs Self-Organized Quantum Dot Lasers: DC and Small-Signal Modulation Properties |
|- |-
|2000 |2000
Line 162: Line 162:
Thomas Skotnicki Thomas Skotnicki
Beatrice Tormen Beatrice Tormen
|Silicon-on-Nothing (SON)--an Innovative Process for Advanced CMOS, which appeared in the November, 2000 issue of Transactions on Electron Devices. |
|- |-
| rowspan="2" |2001 | rowspan="2" |2001
| rowspan="2" |Ioannis Kymissis |Ioannis Kymissis
Christos D. Dimitrakopoulos Christos D. Dimitrakopoulos
Sampath Purusothaman Sampath Purusothaman
|
Raymond M. Warner, Jr.
|High Performance Bottom Electrode Organic Thin-Film Transistors, which appeared in the June 2001 issue of T-ED.
|- |-
|Raymond M. Warner, Jr.
|Microelectronics: Its Unusual Origin and Personality, which appeared in the November 2001 issue of T-ED.
|
|- |-
|2002 |2002
Line 181: Line 181:
Jeffrey Bokor Jeffrey Bokor
Chenming Hu Chenming Hu
|Design & Fabrication of 50-nm Thin-Body p-MOSFETS with a Silicon-Germanium Heterostructure Channel |
|- |-
|2003 |2003
Line 188: Line 188:
Ryuji Ohba Ryuji Ohba
Akira Toriumi Akira Toriumi
|Programmable Single - Electron Transistor Logic for future Low-Power Intelligent LSI : Proposal and Room - Temperature Operation |
|- |-
|2004 |2004
Line 196: Line 196:
Moyra K. McManus Moyra K. McManus
Mark B. Ketchen Mark B. Ketchen
|Testing and Diagnostics of CMOS Circuits Using Light Emission from Off-State Leakage Current |
|- |-
|2005 |2005
Line 204: Line 204:
Raymond Wood Raymond Wood
Christoph Jungemann Christoph Jungemann
|Impact Ionization MOS (I-MOS) - Part I: Device and Circuit Simulations and Part II: Experimental Results |
|- |-
|2006 |2006
Line 211: Line 211:
Lukas Worschech Lukas Worschech
David Hartmann David Hartmann
|Cascaded Quantum Wires and Integrated Design for Complex Logic Functions: Nanoelectronic Full Adder |
|- |-
|2007 |2007
|Azad Naeemi |Azad Naeemi
James D. Meindl James D. Meindl
|Design and Performance Modeling for Single-Walled Carbon Nanotubes as Local, Semiglobal, and Global Interconnects in Gigascale Integrated Systems |
|- |-
|2008 |2008
Line 225: Line 225:
Narayanan Balasumbramanian Narayanan Balasumbramanian
Yee-Chia Yeo Yee-Chia Yeo
|Strained n-MOSFET With Embedded Source/Drain Stressors and Strain-Transfer Structure (STS) for Enhanced Transistor Performance |
|- |-
|2009 |2009
Line 235: Line 235:
Makoto Takamiya Makoto Takamiya
Takayasu Sakurai Takayasu Sakurai
|Printed Nonvolatile Memory for a Sheet-Type Communication System |
|- |-
|2010 |2010
Line 245: Line 245:
Takayasu Sakurai Takayasu Sakurai
Takao Someya Takao Someya
|Large-Area Flexible Ultrasonic Imaging System With an Organic-Transistor Active Matrix |
|- |-
|2011 |2011
Line 259: Line 259:
María Toledano Luque María Toledano Luque
Michael Nelhiebel Michael Nelhiebel
|The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction-Diffusion to Switching Oxide Traps |
|- |-
|2012 |2012
|Kelin Kuhn |Kelin Kuhn
|Considerations for Ultimate CMOS Scaling |
|- |-
|2013 |2013
Line 272: Line 272:
Mitsuru Takenaka Mitsuru Takenaka
Shinichi Takagias Shinichi Takagias
|High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using HfO2/Al2O3/GeOx/Ge Gate Stacks Fabricated by Plasma Postoxidation |
|- |-
|2014 |2014
Line 281: Line 281:
Vincent Delaye Vincent Delaye
Dominique Lafond Dominique Lafond
|Top-Down Fabrication of Epitaxial SiGe/Si Multi-(Core/Shell) p-FET Nanowire Transistors |
|- |-
|2015 |2015
Line 289: Line 289:
Daniel C. Wang Daniel C. Wang
Daniele Ielmini Daniele Ielmini
|Noise-Induced Resistance Broadening in Resistive Switching Memory  Part I: Intrinsic Cell Behavior / Part II: Array Statistics |
|- |-
|2016 |2016
Line 295: Line 295:
Takeshi Hakii Takeshi Hakii
Suguru Noda Suguru Noda
|A Color-Tunable Polychromatic Organic-Light-Emitting-Diode Device With Low Resistive Intermediate Electrode for Rollto-Roll Manufacturing |
|- |-
|2017 |2017
|L. Witters, H. Arimura, F. Sebaai, A. Hikavyy, A. P. Milenin, R. Loo, A. De Keersgieter, G. Eneman, T. Schram, K. Wostyn, K. Devriendt, A. Schulze, R. Lieten, S. Bilodeau, E. Cooper, P. Storck, E. Chiu, C. Vrancken, P. Favia, E. Vancoille, J. Mitard, R. Langer, A. Opdebeeck, F. Holsteyns, N. Waldron, K. Barla, V. De Heyn, D. Mocuta, and N. Collaert |L. Witters, H. Arimura, F. Sebaai, A. Hikavyy, A. P. Milenin, R. Loo, A. De Keersgieter, G. Eneman, T. Schram, K. Wostyn, K. Devriendt, A. Schulze, R. Lieten, S. Bilodeau, E. Cooper, P. Storck, E. Chiu, C. Vrancken, P. Favia, E. Vancoille, J. Mitard, R. Langer, A. Opdebeeck, F. Holsteyns, N. Waldron, K. Barla, V. De Heyn, D. Mocuta, and N. Collaert
|Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition |
|- |-
|2018 |2018
|Konstantin Osipov, Joachim Wuerfl, Ina Ostermay, Frank Brunner, Günther Tränkle and Maniteja Bodduluri |Konstantin Osipov, Joachim Wuerfl, Ina Ostermay, Frank Brunner, Günther Tränkle and Maniteja Bodduluri
|Local 2DEG Density Control in Heterostructures of Piezoelectric Materials and Its Application in GaN HEMT Fabrication Technology |
|- |-
|2019 |2019
|Kihyun Choi, Hyun Chul Sagong, Wonchang Kang, Hyunjin Kim, Jiang Hai, Miji Lee, Bomi Kim, Mi-ji Lee, Soonyoung Lee, Hyewon Shim, Junekyun Park, YoungWoo Cho, Hwa Sung Rhee and Sangwoo Pae |Kihyun Choi, Hyun Chul Sagong, Wonchang Kang, Hyunjin Kim, Jiang Hai, Miji Lee, Bomi Kim, Mi-ji Lee, Soonyoung Lee, Hyewon Shim, Junekyun Park, YoungWoo Cho, Hwa Sung Rhee and Sangwoo Pae
|Enhanced Reliability of 7nm Process Technology Featuring EUV |
|- |-
|2020 |2020
|Kangguo Cheng, Chanro Park, Heng Wu, Juntao Li, Son Nguyen, Jingyun Zhang, Miaomiao Wang, Sanjay Mehta, Zuoguang Liu, Richard Conti, Nicholas J. Loubet, Julien Frougier, Andrew Greene, Tenko Yamashita, Balasubramanian Haran and Rama Divakaruni |Kangguo Cheng, Chanro Park, Heng Wu, Juntao Li, Son Nguyen, Jingyun Zhang, Miaomiao Wang, Sanjay Mehta, Zuoguang Liu, Richard Conti, Nicholas J. Loubet, Julien Frougier, Andrew Greene, Tenko Yamashita, Balasubramanian Haran and Rama Divakaruni
|Improved Air Spacer for Highly Scaled CMOS Technology |
|- |-
|2021 |2021
|Jixuan Wu, Fei Mo, Takuya Saraya, Toshiro Hiramoto, Mototaka Ochi, Hiroshi Goto and Masaharu Kobayashi |Jixuan Wu, Fei Mo, Takuya Saraya, Toshiro Hiramoto, Mototaka Ochi, Hiroshi Goto and Masaharu Kobayashi
|Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled by Sn-Doped InGaZnO for 3-D Embedded RAM Application |
|- |-
|2022 |2022
|Akshay M. Arabhavi, Filippo Ciabattini, Sara Hamzeloui, Ralf Flückiger, Tamara Saranovac, Daxin Han, Diego Marti, Giorgio Bonomo, Rimjhim Chaudhary, Olivier Ostinelli, and Colombo R. Bolognesi |Akshay M. Arabhavi, Filippo Ciabattini, Sara Hamzeloui, Ralf Flückiger, Tamara Saranovac, Daxin Han, Diego Marti, Giorgio Bonomo, Rimjhim Chaudhary, Olivier Ostinelli, and Colombo R. Bolognesi
|InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With fMAX = 1.2 THz |
|- |-
|2023 |2023
|Weiyi Li, Brian Romanczyk, Matthew Guidry, Emre Akso, Nirupam Hatui, Christian Wurm, Wenjian Liu, Pawana Shrestha, Henry Collins, Christopher Clymore, Stacia Keller, and Umesh K. Mishra |Weiyi Li, Brian Romanczyk, Matthew Guidry, Emre Akso, Nirupam Hatui, Christian Wurm, Wenjian Liu, Pawana Shrestha, Henry Collins, Christopher Clymore, Stacia Keller, and Umesh K. Mishra
|Record RF Power Performance at 94 GHz From Millimeter-Wave N-Polar GaN-on-Sapphire Deep-Recess HEMTs |
|} |}



Revision as of 16:25, 6 December 2024

IEEE award
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This article, Paul Rappaport Award, has recently been created via the Articles for creation process. Please check to see if the reviewer has accidentally left this template after accepting the draft and take appropriate action as necessary.
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The Paul Rappaport Award was established in 1984 to commemorate the achievement of the late American physicist Paul Rappaport. The best paper appearing in a fast turn around archival publication of the IEEE Electron Devices Society is given the award annually. The recipients are awarded a certificate and $2,500, presented at the IEEE EDS International Electron Devices Meeting.

Recipients

The past recipients are:

Year Recipient(s) Paper
1982 R. Fabian Pease

David B. Tuckerman

High-Performance Heat Sinking for VLS
1983 Jaroslav Hynecek Electron-Hole Recombination Antiblooming for Virtual-Phase CCD Imager
1984 Shojiro Asai

Norikazu Hashimoto Kiyoo Itoh Tokuo Kure Hideo Sunami Toru Toyabe

A Corrugated Capacitor Cell (CCC)
1985 Roger Epworth

Linus A. Fetter Richard E. Howard Lawrence D. Jackel Paul M. Mankiewich Kristan S. Ralls William J. Skocpol Donald M. Tennant

Single electron switching events in nanometer-scale Si MOSFET's
1986 Ben T. Ebihara

Peter Ramins

Improvements in MDC and TWT overall efficiency through the application of carbon electrode surfaces
1987 Richard B. True Emittance and the design of beam formation, transport, and collection systems in periodically focused TWT's
1988 Diane R. Ahrendt

Yeou-Chong Vladimir F. Drobny Valdis E. Garuts Robert D. Herman Eric E. Lane June S. Lee Evan E. Patton Tadanori Yamaguchi Simon Yu Todd H. Yuzuriha

Process and device performance of a high-speed double poly-Si bipolar technology using borosenic-poly process with coupling-base implant
1989 James F. Gibbons

Judy L. Hoyt Clifford A. King

Bandgap and transport properties of Si/sub 1-x/Ge/sub x/ by analysis of nearly ideal Si/Si/sub 1-x/Ge/sub x//Si heterojunction bipolar transistors
1990 Khalil Najafi

Kenichiro Suzuki Kensall D. Wise

A 1024-element high-performance silicon tactile imager
1991 Hiroshi Fukuda

Akira Imai Shinji Okazaki Tsuneo Terasawa

New approach to resolution limit and advanced image formation techniques in optical lithography
1992 April S. Brown

Linda M. Jelloian Loi D. Nguyen Mark A. Thompson

50-nm self-aligned-gate pseudomorphic AlInAs/GaInAs high electron mobility transistors
1993 Hisashi Hara

Hiroshi Iwai Toyota Morimoto Masakatsu Tsuchiaki

A new charge pumping method for determining the spatial distribution of hot-carrier-induced fixed charge in p-MOSFETs
1994 Takashi Hashimoto

Tomoyuki Ishii Takashi Kobayashi Fumio Murai Koichi Seki Kazuo Yano

Room-temperature single-electron memory
1995 Herbert Lifka

Ger M. Paulzen Henk G. Pomp Pierre H. Woerlee Reinout Woltjer

Three Hot-Carrier Degradation Mechanisms in Deep-Submicron PMOSFETS
1996 Chris J. Diorio

Paul E. Hasler Carver A. Mead Bradley A. Minch

A Single-Transistor Silicon Synapse
1997 Dimitri A. Antoniadis

Anantha P. Chandrakasan Carlin J. Vieri Isabel Y. Yang

Back-Gated CMOS on SOIAS For Dynamic Threshold Voltage Control
1998 Yujun Li

Tso-Ping Mai

A Front-Gate Charge-Pumping Method for Probing Both Interfaces in SOI Devices
1999 Pallab Bhattacharya

Kishore K. Kamath Jasprit Singh David Klotzkin Jamie Phillips Hong-Tao Jiang Nalini Chervela Theodore B. Norris Tom Sosnowski Joy Laskar M. Ramana Murty

In (Ga)As/GaAs Self-Organized Quantum Dot Lasers: DC and Small-Signal Modulation Properties
2000 Didier Dutartre

Malgorzata Jurczak Damien Lenoble Jose Martins Stephanie Monfray Roland Pantel M. Paoli Jorge Luis Regolini Pascal Ribot Thomas Skotnicki Beatrice Tormen

Silicon-on-Nothing (SON)--an Innovative Process for Advanced CMOS
2001 Ioannis Kymissis

Christos D. Dimitrakopoulos Sampath Purusothaman

High Performance Bottom Electrode Organic Thin-Film Transistors
Raymond M. Warner, Jr. Microelectronics: Its Unusual Origin and Personality
2002 Yee Chia Yeo

Vivek Subramanian Jakub Kedzierski Peiqi Xuan Tsu-Jae King Jeffrey Bokor Chenming Hu

Design & Fabrication of 50-nm Thin-Body p-MOSFETS with a Silicon-Germanium Heterostructure Channel
2003 Ken Uchida

Junji Koga Ryuji Ohba Akira Toriumi

Programmable Single-Electron Transistor Logic for future Low-Power Intelligent LSI : Proposal and Room-Temperature Operation
2004 Franco Stellari

Peilin Song James C. Tsang Moyra K. McManus Mark B. Ketchen

Testing and Diagnostics of CMOS Circuits Using Light Emission from Off-State Leakage Current
2005 Kailash Gopalakrishnan

Peter B. Griffin James D. Plummer Raymond Wood Christoph Jungemann

Impact Ionization MOS (I-MOS) - Part I: Device and Circuit Simulations and Part II: Experimental Results
2006 Billy Lau

Alfred Forchel Lukas Worschech David Hartmann

Cascaded Quantum Wires and Integrated Design for Complex Logic Functions: Nanoelectronic Full Adder
2007 Azad Naeemi

James D. Meindl

Design and Performance Modeling for Single-Walled Carbon Nanotubes as Local, Semiglobal, and Global Interconnects in Gigascale Integrated Systems
2008 Kah-Wee Ang

Jian Qiang Lin Ganesh S. Samudra Shih-Hang Tung Narayanan Balasumbramanian Yee-Chia Yeo

Strained n-MOSFET With Embedded Source/Drain Stressors and Strain-Transfer Structure (STS) for Enhanced Transistor Performance
2009 Takao Someya

Tsuyoshi Sekitani Koichiro Zaitsu Yoshiaki Noguchi Kiyoshiro Ishibe Makoto Takamiya Takayasu Sakurai

Printed Nonvolatile Memory for a Sheet-Type Communication System
2010 Yusaku Kato

Tsuyoshi Sekitani Yoshiaki Noguchi Tomoyuki Yokota Makoto Takamiya Takayasu Sakurai Takao Someya

Large-Area Flexible Ultrasonic Imaging System With an Organic-Transistor Active Matrix
2011 Tibor Grasser

Ben Kaczer Wolfgang Goes Hans Reisinger Thomas Aichinger Philipp Hehenberger Paul-Jürgen Wagner Franz Schanovsky Jacopo Franco María Toledano Luque Michael Nelhiebel

The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction-Diffusion to Switching Oxide Traps
2012 Kelin Kuhn Considerations for Ultimate CMOS Scaling
2013 Rui Zhang

Po-Chin Huang Ju-Chin Lin Noriyuki Taoka Mitsuru Takenaka Shinichi Takagias

High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using HfO2/Al2O3/GeOx/Ge Gate Stacks Fabricated by Plasma Postoxidation
2014 Sylvain Barraud

Jean-Michel Hartmann Virginie Maffini-Alvaro Lucie Tosti Vincent Delaye Dominique Lafond

Top-Down Fabrication of Epitaxial SiGe/Si Multi-(Core/Shell) p-FET Nanowire Transistors
2015 Stefano Ambrogio

Simone Balatti Vincent McCaffrey Daniel C. Wang Daniele Ielmini

Noise-Induced Resistance Broadening in Resistive Switching Memory  Part I: Intrinsic Cell Behavior / Part II: Array Statistics
2016 Takatoshi Tsujimura

Takeshi Hakii Suguru Noda

A Color-Tunable Polychromatic Organic-Light-Emitting-Diode Device With Low Resistive Intermediate Electrode for Rollto-Roll Manufacturing
2017 L. Witters, H. Arimura, F. Sebaai, A. Hikavyy, A. P. Milenin, R. Loo, A. De Keersgieter, G. Eneman, T. Schram, K. Wostyn, K. Devriendt, A. Schulze, R. Lieten, S. Bilodeau, E. Cooper, P. Storck, E. Chiu, C. Vrancken, P. Favia, E. Vancoille, J. Mitard, R. Langer, A. Opdebeeck, F. Holsteyns, N. Waldron, K. Barla, V. De Heyn, D. Mocuta, and N. Collaert Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition
2018 Konstantin Osipov, Joachim Wuerfl, Ina Ostermay, Frank Brunner, Günther Tränkle and Maniteja Bodduluri Local 2DEG Density Control in Heterostructures of Piezoelectric Materials and Its Application in GaN HEMT Fabrication Technology
2019 Kihyun Choi, Hyun Chul Sagong, Wonchang Kang, Hyunjin Kim, Jiang Hai, Miji Lee, Bomi Kim, Mi-ji Lee, Soonyoung Lee, Hyewon Shim, Junekyun Park, YoungWoo Cho, Hwa Sung Rhee and Sangwoo Pae Enhanced Reliability of 7nm Process Technology Featuring EUV
2020 Kangguo Cheng, Chanro Park, Heng Wu, Juntao Li, Son Nguyen, Jingyun Zhang, Miaomiao Wang, Sanjay Mehta, Zuoguang Liu, Richard Conti, Nicholas J. Loubet, Julien Frougier, Andrew Greene, Tenko Yamashita, Balasubramanian Haran and Rama Divakaruni Improved Air Spacer for Highly Scaled CMOS Technology
2021 Jixuan Wu, Fei Mo, Takuya Saraya, Toshiro Hiramoto, Mototaka Ochi, Hiroshi Goto and Masaharu Kobayashi Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled by Sn-Doped InGaZnO for 3-D Embedded RAM Application
2022 Akshay M. Arabhavi, Filippo Ciabattini, Sara Hamzeloui, Ralf Flückiger, Tamara Saranovac, Daxin Han, Diego Marti, Giorgio Bonomo, Rimjhim Chaudhary, Olivier Ostinelli, and Colombo R. Bolognesi InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With fMAX = 1.2 THz
2023 Weiyi Li, Brian Romanczyk, Matthew Guidry, Emre Akso, Nirupam Hatui, Christian Wurm, Wenjian Liu, Pawana Shrestha, Henry Collins, Christopher Clymore, Stacia Keller, and Umesh K. Mishra Record RF Power Performance at 94 GHz From Millimeter-Wave N-Polar GaN-on-Sapphire Deep-Recess HEMTs


See also

Paul Rappaport

References

  1. "Paul Rappaport Award - IEEE Electron Devices Society". eds.ieee.org. Retrieved 2024-12-06.
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