Misplaced Pages

This is an old revision of this page, as edited by Afyoung (talk | contribs) at 19:54, 30 March 2006. The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

Standard Cell design involves compiling Hardware Description Language (HDL) designs into standard logic libraries. The standard cell libraries consist of a collection of logic functions (AND, OR, invert, XOR, XNOR, buffer, etc.) that have both a logical and physical representation. The logical representation describes the behavior of the cell and can be represented by a truth-table or boolean algebra equation. The physical representation is the implementation of the logical description first as a netlist, which at its lowest level is a nodal description of transistor connections (commonly SPICE). After a transistor level netlist is created, the cell can be "layed-out" creating actual physical representations of the transistors and connections in a format that can be manufactured.

Using Electronic Design Automation (EDA) tools, standard cells can be synthesized, placed, and routed efficiently and effectively. During the synthesis step, the EDA tool utilizes the logical representation of the cell(s) in order to help determine which logic functions are needed to turn the design into reality (i.e., an actual piece of hardware). Once the cell's logic functions are chosen, the EDA's placement and routing tools utilize known physical information about the cells (e.g., size and location of ports) to determine how the cell should be layed out, establish the best routing configuration, etc. This process results in physical representation of the entire design. This design can then be taken to a commercial or government laboratory to begin manufacturing and construction.

Typically the standard cells have a constant size in at least one dimension that allows them to be lined up in rows on the integrated circuit. The chip will consist of a huge number of rows (with power and ground running next to each row) with each row filled with the various cells making up the actual design.

See also

• Integrated Circuits
• Circuit Design
• Semiconductor

External links

• Virginia Tech— This is a standard cell library developed by the Virginia Technology VLSI for Telecommunications (VTVT)

• Electronic design automation