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Revision as of 18:45, 1 May 2006 by Keerthi msrit (talk | contribs)(diff) ← Previous revision | Latest revision (diff) | Newer revision → (diff)PSoC is a family of mixed-signal arrays made by Cypress Semiconductor, featuring a microcontroller and integrated analog and digital peripherals.
PSoC is an acronym for "Programmable System-on-Chip". PSoC™ Functional Overview The PSoC™ family consists of many Mixed-Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components with one, low cost single-chip programmable device. PSoC devices include configurable blocks of analog and digital logic, as well as programmable interconnects. This architecture allows the user to create customized peripheral configurations that match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pin-outs and packages. The PSoC architecture is comprised of four main areas: PSoC core, digital System, Analog System, and System Resources. Configurable global busing allows all the device resources to be combined into a complete custom system. The PSoC CY8C29x66 family can have up to eight IO ports that connect to the global digital and analog interconnects, providing access to 16 digital blocks and 12 analog blocks. The PSoC Core The PSoC Core is a powerful engine that supports a rich feature set. The core includes a CPU, memory, clocks, and configurable GPIO (General Purpose IO). The M8C CPU core is a powerful processor with speeds up to 24 MHz, providing a four MIPS 8-bit Harvard architecture microprocessor. The CPU utilizes an interrupt controller with 25 vectors, to simplify programming of real time embedded events. Program execution is timed and protected using the included Sleep and Watch Dog Timers (WDT). Memory encompasses 32 KB of Flash for program storage, 2 KB of SRAM for data storage, and up to 2 KB of EEPROM emulated using the Flash. Program Flash utilizes four protection levels on blocks of 64 bytes, allowing customized software IP protection. The PSoC device incorporates flexible internal clock generators, including a 24 MHz IMO (internal main oscillator) accurate to 2.5% over temperature and voltage. The 24 MHz IMO can also be doubled to 48 MHz for use by the digital system. A low power 32 kHz ILO (internal low speed oscillator) is provided for the Sleep timer and WDT. If crystal accuracy is desired, the ECO (32.768 kHz external crystal oscillator) is available for use as a Real Time Clock (RTC) and can optionally generate crystal- accurate 24 MHz system clock using a PLL. The clocks, together with programmable clock dividers (as a System Resource), provide the flexibility to integrate almost any timing requirement into the PSoC device. PSoC GPIOs provide connection to the CPU, digital and analog resources of the device. Each pin’s drive mode may be selected from eight options, allowing great flexibility in external interfacing. Every pin also has the capability to generate a system interrupt on high level, low level, and change from last read. PSoC Block diagram:
The Digital System The Digital System is composed of 16 digital PSoC blocks. Each block is an 8-bit resource that can be used alone or combined with other blocks to form 8, 16, 24, and 32-bit peripherals, which are called user module references. Digital peripheral configurations include those listed below. • PWMs (8 to 32 bit) • PWMs with Dead band (8 to 32 bit) • Counters (8 to 32 bit) • Timers (8 to 32 bit) • UART 8 bit with selectable parity (up to 4) • SPI master and slave (up to 4 each) • I2C slave and multi-master (1 available as a System Resource) • Cyclical Redundancy Checker/Generator (8 to 32 bit) • IrDA (up to 4) • Pseudo Random Sequence Generators (8 to 32 bit) The digital blocks can be connected to any GPIO through a series of global buses that can route any signal to any pin. The buses also allow for signal multiplexing and for performing logic operations. This configurability frees your designs from the constraints of a fixed peripheral controller. Digital blocks are provided in rows of four, where the number of blocks varies by PSoC device family. This allows you the optimum choice of system resources for your application. The Analog System The Analog System is composed of 12 configurable blocks, each comprised of an opamp circuit allowing the creation of complex analog signal flows. Analog peripherals are very flexible and can be customized to support specific application requirements. Some of the more common PSoC analog functions (most available as user modules) are listed below. • Analog-to-digital converters (up to 4, with 6- to 14-bit resolution, selectable as Incremental, Delta Sigma, and SAR) • Filters (2, 4, 6, or 8 pole band-pass, low-pass, and notch) • Amplifiers (up to 4, with selectable gain to 48x) • Instrumentation amplifiers (up to 2, with selectable gain to 93x) • Comparators (up to 4, with 16 selectable thresholds) • DACs (up to 4, with 6- to 9-bit resolution) • Multiplying DACs (up to 4, with 6- to 9-bit resolution) • High current output drivers (four with 40 mA drive as a Core resource) • 1.3V reference (as a System Resource) • DTMF Dialer • Modulators • Correlators • Peak Detectors • Many other topologies possible Analog blocks are provided in columns of three, which includes one CT (Continuous Time) and two SC (Switched Capacitor) blocks.
Digital system Block diagram Analog system Block diagram
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