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OR-AND-invert gates or OAI-gates are logic gates comprising OR gates followed by a NAND gate. They can be efficiently implemented in logic families like CMOS and TTL. They are dual to AND-OR-invert gates.

Overview

OR-AND-invert gates implement the inverted product of sums. ${\displaystyle n}$ groups of ${\displaystyle m_{i}}$, ${\displaystyle m_{i}\geq 1,i=1\ldots n}$ input signals combined with OR, and the results then combined with NAND.

Examples

2-1 OAI-gate

A 2-1-OAI gate realizes the function

${\displaystyle Y={\overline {(A\lor B)\land C}}}$

with the truth table shown below.

2-2 OAI gate

A 2-2-OAI gate realizes the function

${\displaystyle Y={\overline {(A\lor B)\land (C\lor D)}}}$

with the truth table shown below.

Realization

OAI-gates can efficiently be implemented as complex gates. An example of a 3-1 OAI-gate is shown in the figure below.

Examples of use

One possibility of implementing an XOR gate is by using a 2-2-OAI-gate with non-inverted and inverted inputs.

References

1. Hendrichs, Norman. "CMOS OAI31 or-and-invert complex gate". University of Hamburg. Retrieved 2024-02-12.
2. Fischer, P. "Aussagenlogik und Gatter" (PDF). University of Heidelberg. Retrieved 2024-01-21.

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